In the field of packaging ICs, including supporting ICs on printed circuit boards and other substrates, the standard method of forming interconnecting members, referred to as signal traces, includes a step of electroplating a conductor, such as gold. The electroplating process requires a conductive path between the trace receiving the gold and a power supply.
The standard physical construction is the fabrication of a conductive path attached to the signal trace at some convenient location and extending through or along the surface of the substrate to a suitable connection point. The conductive path is referred to as a plating tail. In high-frequency (high-speed) circuits, there can be a significant problem resulting from plating tails, in that the signal can reflect off the end of the tail or a step in the tail and then interfere with an IC, e.g. by canceling the desired signal.
A common solution to this problem is to remove all or most of the tail. e.g. by etching selected areas on the substrate. Such a selective etching process requires that the areas be defined by a mask that protects the areas that are not to be etched, and imposes an additional cost on the product, even if there are no other problems.
It would be advantageous to eliminate the need to define selected areas and then etch them.